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cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 1 f block diagram description cm6523 / CM6523B are a usb 2.0 audio chip builds in 8051 for flexible application s . with internal 2 - channel adc and dac , s/pdif in/out interface and usb 2.0 high speed switch makes it suits for different kinds of docking applications , s uch as idevice d ocking , android phone or tablet/slate docking device and netbook/notebook docking. cm6523 / CM6523B is compatible with usb audio class 1.0, thus it can plug & play without additional software installation on the major operation systems. the internal dac/adc and s/pdif out interface support 96k/88.2k/ 48k/44.1k hz sampling rate and 16 /24 bit resolution . cm6523 / CM6523B integrates the equalizer on both playback and recording paths . w ith i2s in /out interface, it can connect external dac to get higher audio quality or external d sp to process the audio data features ? usb 2. 0 full - speed com pliant ? usb audio class 1.0 comp liant ? usb human interface device (hid) class 1.1 compliant ? build in usb 2.0 high speed switch ? 2 channel dac for audio output interface ? 2 channel adc for audio input interface ? buil d in 96k/88.2k/ 48k/44.1khz and 16/24 bit s/pdif transmitter ? build in equalizer on both playback and recording paths ? build in agc on recording path ? support digital microphone interface ? su pport control, interrupt, bulk, and isochronous data transfers ? support synchronous and asynchronous audio data synchronization ? embedded 1t 8051 ? master i2c control interface for external audio c o n t r o l b u s sram rom mcu m u x agc adc m u x dac spdif in 2 channel i 2 s in microphone in line in speaker / heaphone 2 channel i 2 s out spdif out gpio x 32 uart , spi , i 2 c usb interface crystal eeprom
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 2 release note revision date description 0.9 2011/11/10 first release of preliminary technical information 0.91 2011/1/12 modify some pin description 0.92 2012/02/10 - modify gpio default status 0.93 2012/04/03 - modify pdsw as do pin - add information in chapter 6, 7 0.94 2012/04/20 - modify some wordings 0.95 2012/05/17 - add more audio quality test into audio performance chapter 0.96 2012/06/13 - modify power pin description 0.97 2012/06/21 - modify gpio pin number, subtract 1 0.98 2012/06/29 - modify package part number to cm6523 1.00 2012/10/19 - formal release 1.01 2013/01/25 - remove s/pdif 32k sample rate support 1.02 2013/03/01 - add CM6523B support.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 3 table of contents release note ............................................................................................................................................ 2 1 description and overview ............................................................................................................... 5 2 features ............................................................................................................................................ 5 3 applications ..................................................................................................................................... 7 4 block diagram ................................................................................................................................. 8 5 pin assignment ................................................................................................................................ 9 5.1 pin - out diagram ................................................................................................................. 9 5.2 pin description ...................................................................................................................11 6 usb au dio topology ..................................................................................................................... 15 6.1 headset topology .............................................................................................................. 15 6.2 speaker topology .............................................................................................................. 16 6.3 docking topology ............................................................................................................. 18 6.4 micr ophone (stereo) topology ......................................................................................... 19 7 function description ...................................................................................................................... 20 7.1 playback equalizer ............................................................................................................ 20 7.1.1 5- band equalizer ........................................................................................................... 20 7.1.2 4 preset eq mode .......................................................................................................... 23 7.2 recording equalizer .......................................................................................................... 24 7.3 recording agc ................................................................................................................. 24 7.4 usb 2.0 switch ................................................................................................................. 26 7.5 hid fu nction .................................................................................................................... 26 7.5.1 hid interrupt in ...................................................................................................... 27 7.5.2 hid set_output_report .......................................................................................... 28 7.6 vendor command definition ............................................................................................ 29 7.6.1 vender command read ......................................................................................... 29 7.6.2 vender command write ........................................................................................ 30 7.7 i2s control description ..................................................................................................... 30 7.7.1 i2s format description ........................................................................................... 30 7.7.2 i2s mclk/bclk/lrck ratio and format for cm6523 / CM6523B ................ 32 7.8 spdif control description ............................................................................................... 34 7.8.1 spdif frame description ...................................................................................... 34 7.8.2 spdif out channel status ..................................................................................... 36 7.8.3 spdif in channel status ....................................................................................... 36 7.9 digital mic ........................................................................................................................ 37 7.10 i2c int erface ..................................................................................................................... 38
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 4 7.10.1 i2c master mode ................................................................................................... 38 7.10.2 i2c - master read with clk_sync mode ................................................................... 38 7.10.3 i2c slave mode ..................................................................................................... 39 7.11 spi interface ...................................................................................................................... 39 7.11.1 spi master mode ................................................................................................... 39 7.11.2 spi transfer length 2b/3b ...................................................................................... 40 7.11.3 spi latch data at high/low clock state .................................................................... 41 7.11.4 spi slave mode ...................................................................................................... 45 8 electrical characteristics ................................................................................................................ 47 8.1 absolute maximum ratings ............................................................................................. 47 8.2 recommended operation conditions ............................................................................... 47 8.3 power consumption .......................................................................................................... 47 8.4 dc characteristics ............................................................................................................ 47 8.5 au dio performance ........................................................................................................... 49 8.5.1 dac audio quality ............................................................................................... 49 8.5.2 adc audio quality ............................................................................................... 50 8.5.3 a - a path audio quality ......................................................................................... 51 9 package dimension ........................................................................................................................ 53
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 5 1 description and overview cm6523 / CM6523B is a usb 2.0 audio chip builds in 8051 for flexible application s . with internal 2 - channel adc and dac , s/pdif in/out interface and usb 2.0 high speed switch makes it suits for different kinds of docking applications , s uch as idevice d ocking , android phone or tablet/slate docking device and netbook/notebook docking. cm6523 / CM6523B is compatibl e with usb audio class 1.0, thus it can plug & play without additional software installation on the major operation systems. the internal dac/adc and s/pdif out interface support 96k/88.2k/ 48k/44.1k hz sampling rate and 16 /24 bit resolution . cm6523 / CM6523B integrates the equalizer on both playback and recording paths . w ith i2s in /out interface, it can connect external dac to get higher audio quality or external dsp to process the audio data. 2 features usb compliance ? usb spec. rev.2.0 full - speed mode compati ble ? 3 usb upstream ports for connecting to pc and ipod at the same time ? latest usb audio device class definition release 1.0 compatible ? usb human interface device (hid) class definition release 1.1 compliant ? supports usb suspend/resume/reset functi ons ? supports control, interrupt, bulk, and isochronous data transfers audio engine ? playback streams: ? default sample rates: 8k/11.025k/16k/22. 0 5k/32k/ 44.1k/48k/ 88.2k/ 96k ? supported bit length: 16/24 bit ? dma support s 2 - channel data to dac /i2s output ? dma supports s/pdif output ? capture streams: ? default sample rates: 8k/11.025k/16k/22.05k/32k/ 44.1k/48k /88.2k /96k ? supported bit length: 16/24 bit ? dma support s 2 - channel data from adc /i2s input ? dma supports s/pdif in put ? digital mixing/routing engine to mix input streams to output streams audio i/o ? 2 pairs i2s or left - justified serial audio output interface ? 2 pairs i2s or left - justified serial audio in put interface
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 6 ? 2 channel mic in ? 2 channel digital mic in ? 2 channel line in ? 2 channel line out ? built - in 9 6 k/ 88.2 k/48k/44.1khz and 16/24 - bit s/pdif receiver ? built - in 9 6 k/ 88.2 k/48k/44.1khz and 16/24 - bit s/pdif transmitter integrated 8051 micro - processor ? embedded 8051 micro - processor to handle the comment/protocol transactions ? connects to an external eeprom memory for firmware codes ? hid interrupts can be implemented via firmware codes ? provides maximum hw configuration flexibility with firmware code upgrade ? vid/pid/product string can be customized via firmware code programming control interface ? master i2c control inte rface for external audio devices or eeprom access ? master spi control interface for external audio devices or eeprom access ? max. 3 2 gpio pins can be configured via firmware programming ? gpios are configured as hid key and led indicators and ir receiver general ? hw pin for usb audio class 1.0 application mode configuration including speaker/headset/docking/mic ? hw pin for a - a path enable/disable ? hw pin for self - power or bus - power mode selection ? hw eq for both playback and record path ? hw pin for eq enable/disable selection ? hw pin for pid selection ? only single 12mhz crystal input is required (embedded p ll function) ? single 5 v power supply (embedded 5 v to 1.8 v regulator for digital core , 5v to 3.3v regulator for digital io, 5v to 3.5v regulator for analog codec ) ? 3.3v digital i/o pads with 5v tolerance ? industrial standard lqfp - 128 package ( 14x14 mm) optional value - added software features:
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 7 3 application s ? idevice docking ? android docking ? notebook/netbook docking ? audio box ? usb dac
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 8 4 block diagram control bus sram rom mcu m u x agc adc m u x dac spdif in 2 channel i2s in microphone in line in speaker/ heaphone 2 channel i2s out spdif out gpio x 32 uart, spi, i2c usb interface crystal eeprom cm6523 / CM6523B functional block diagram
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 9 5 pin assignment 5.1 pin - out diagram cm 6523 lqfp 128 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 44 43 42 41 40 39 38 37 36 35 34 33 48 47 46 45 gpio _14 test gpio _15 pdsw gpio _16 gpio _17 spdif_o gpio _18 gpio _19 gpio _24 gpio _25 gpio _13 vcc18io xtal _i xtal _o nc spi_ cs0 spi_sck spi_ miso adc_lrck adc_din adc_ bclk adc_ mclk gpio _7 gpio _6 a- a mix_en eq_en 92 91 90 89 88 87 86 85 84 83 82 81 96 95 94 93 xmicbias 1 xmicbias 2 xlnir xlnil xmicr xmicl xacrefr xacrefl agnd nc nc nc agnd agnd xvbg_ext xvag 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 dac_ dout dac_lrck dac_din gpio _23 gpio _22 mode _0 mode _1 gnd3io gpio _21 gpio _20 gpio _12 gpio _11 gpio _10 gpio _9 gpio _8 vcc3io spi_ mosi spdif_i adc_ dout gnd3io gnd18io 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 gpio _5 gpio _4 gpio _3 vcc3io i2c _sdat gpio _0 gpio _31 gpio _30 gpio _28 gpio _28 gpio _27 gpio _26 gpio _2 gpio _1 i2c _ sclk resetn 60 59 58 57 56 55 54 53 52 51 50 49 64 63 62 61 nc nc nc nc nc vcc3io usb_dm usb_dp gnd18io sel_1 sel_2 nc xv18 xv33 dv50 dgnd 76 75 74 73 72 71 70 69 68 67 66 65 80 79 78 77 rstb nc nc nc nc nc nc nc nc nc nc nc usb_dm _pc usb_dp_pc usb_dm _ ipod usb_dp_ ipod 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 nc nc nc nc xv35_adc xvoladj agnd xlnoutl xlocom xv35_driver agnd xlnoutr xv35_dac av50 dac_ mclk dac_ bclk
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 10 cm 6523b lqfp 128 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 44 43 42 41 40 39 38 37 36 35 34 33 48 47 46 45 gpio _14 test gpio _15 pdsw gpio _16 gpio _17 spdif_o gpio _18 gpio _19 gpio _24 gpio _25 gpio _13 vcc18io xtal _i xtal _o nc spi_ cs0 spi_sck spi_ miso adc_lrck adc_din adc_ bclk adc_ mclk gpio _7 gpio _6 a- a mix_en eq_en 92 91 90 89 88 87 86 85 84 83 82 81 96 95 94 93 xmicbias 1 xmicbias 2 xlnir xlnil xmicr xmicl xacrefr xacrefl agnd nc nc nc agnd agnd xvbg_ext xvag 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 dac_ dout dac_lrck dac_din gpio _23 gpio _22 mode _0 mode _1 gnd3io gpio _21 gpio _20 gpio _12 gpio _11 gpio _10 gpio _9 gpio _8 vcc3io spi_ mosi spdif_i adc_ dout gnd3io gnd18io 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 gpio _5 gpio _4 gpio _3 vcc3io i2c _sdat gpio _0 gpio _31 gpio _30 gpio _28 gpio _28 gpio _27 gpio _26 gpio _2 gpio _1 i2c _ sclk resetn 60 59 58 57 56 55 54 53 52 51 50 49 64 63 62 61 nc nc nc nc nc vcc3io usb_dm usb_dp gnd18io sel _1 sel _2 nc xv18 xv33 dv50 dgnd 76 75 74 73 72 71 70 69 68 67 66 65 80 79 78 77 rstb nc nc nc nc nc nc nc nc nc nc nc usb_dm _pc usb_dp_pc usb_dm _ipod usb_dp_ ipod 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 nc nc nc nc xv35_adc xvoladj agnd xlnoutl xlocom xv35_driver agnd xlnoutr xv35_dac av50 dac_ mclk dac_ bclk
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 11 5.2 p in d escription pin # symbol i/o description clock 47 xtal_o ao 12mhz crystal oscillator output 46 xtal_i ai 12mhz crystal oscillator input usb2.0 bus interface 53 usb_d m aio usb 2.0 data negative (usb d - signal) 52 usb_dp aio usb 2.0 data positive (usb d+ signal) 78 usb_d m _ipod aio usb 2.0 data negative (usb d - signal) 77 usb_dp _ipod aio usb 2.0 data positive (usb d+ signal) 80 usb_d m _pc aio usb 2.0 data negative (usb d - signal) 79 usb_dp _pc aio usb 2.0 data positive (usb d+ signal) power/ground 63 dv50 pwr 5v digital power for 5/3.3 regulator 45 vcc18io ao 1.8v power for digital i/o 54 vcc3io pwr 3.3v power for digital i/o 62 xv33 ao regulator 3.3v output, drive capacity 150ma for usb and digital i/o 48 gnd 18io gnd digital ground 128 vcc3io pwr 3.3v power for digital i/o 20 vcc3io pwr 3.3v power for digital i/o 51 gnd18 gnd digital ground 61 xv18 ao regulator 1.8v output, drive capacity 100ma for digital core 120 gn d3io gn d digital ground 16 gnd 3io gnd digital ground 64 dgnd gnd digital ground 110 av50 pwr 5v analog power for 5/3.5 regulator 84 agnd gn d analog ground 109 xv35_dac ao regulator 3.5v output, drive capacity 100ma for analog and amplifier 101 xv35_adc ao 3.5v power for adc and voltage and current reference 95 agnd gn d analog ground 96 agnd gn d analog ground 103 agnd gn d analog ground 106 xv35_driver ao 3.5v power for driver 107 agnd gn d analog ground
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 12 audio interface 85 xacref l ao common reference voltage for input signal 86 xacref r ao common reference voltage for input signal 87 xmicl ai mic in left channel 88 xmic r ai mic in right channel 89 xlinl ai line in left channel 90 xlinr ai line in right channel 91 xmicbias2 ao microphone bias 92 xmicbias1 ao microphone bias 93 x va g ao voltage reference cap filter 94 xvbg_ext ai external bandgap reference voltage input(level:1.24v) 102 xvoladj ai analog control voltage input for playback volume control 104 xlnoutl ao line out left channel 105 xlocom ao line out common reference for cap - less connection 108 xlnoutr ao line out right channel 2 - channel i2s dac interface 111 dac_mclk do i2s master clock programmable 3.3v output buffer 112 dac_bclk dio i 2s bit clock program mable 3.3v bidirectional buffer , pull - down 113 dac_dout do i2s serial data output for channel 0, 1 programmable 3.3v output buffer 114 dac_lrck dio i2s left/right clock programmable 3.3v bidirectional buffer, pull - down 115 dac_din di input from dsp to dac for playback 2 - channel i2s adc interface 7 adc_ dout do output from adc to dsp for data processing 8 adc_ lrck dio i2s left/right clock programm able 3.3v bidirectional buffer , pull - down 9 adc_ din di i2s serial data input for channel 0, 1 programmable 3.3v input buffer, schmitt trigger, pull - down 10 adc_ bclk dio i2s bit clock programmable 3.3v bidirectional bu ffer , pull - down 11 adc_ mclk do i2s master clock programmable 3.3v output buffer s/pdif i/o 6 spdif_ i di s/pdif receiver programmable 3.3v output buffer 37 spdif_o do s/pdif transmitter programmable 3.3v output buffer gpio
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 13 25 gpio_ 0 dio general purpose input/output ( default volume up ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 22 gpio_ 1 dio general purpose input/output (default volume down ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 21 gpio_ 2 dio general purpose input/output (default play mute ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 1 9 gpio_ 3 dio general purpose input/output (default rec mute ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 18 gpio_ 4 dio general purpose input/output (default led live, 2k hz ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 17 gpio_ 5 dio general purpose input/output (default led play mute ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 13 gpio_ 6 dio general purpose input/output (default led rec mute, 1k hz ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 12 gpio_ 7 dio general purpose input/output (default eq mode select0 ). programmable 3.3v/5v tolerance bidirectional buffer , pull - down gpio[8:7 ]=0,0: normal gpio [8:7] =1,0: communication gpio [8:7] =0,1: gaming gpio [8:7] =1,1: movie 127 gpio_ 8 dio general purpose input/output (default eq mode selet1 ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 126 gpio_ 9 dio general purpose input/output (default rec clip indicator ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 125 gpio_1 0 dio general purpose input/output (default wave volume up ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 124 gpio_1 1 dio general purpose input/output (default wave volume down ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 123 gpio_1 2 dio general purpose input/output (default play/pause ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 44 gpio_1 3 dio general purpose input/output (default stop ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 43 gpio_1 4 dio general purpose input/output (default next ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 41 gpio_1 5 dio general purpose input/output (default previous ). programmable 3.3v/5v tolerance bidirectional buffer, pull - up 39 gpio _16 dio general purpose input/output (default mcu_rxd ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 38 gpio_ 1 7 dio general purpose input/output (default mcu_trx ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 36 gpio_1 8 dio general purpose input/output (default ir module ). programmable 3.3v/5v tolerance bidirectional buffer, pull - down 35 gpio_ 19 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 122 gpio_20 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 121 gpio_21 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 117 gpio_22 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 116 gpio_23 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 34 gpio_24 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 33 gpio_25 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 31 gpio_26 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 30 gpio_27 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 29 gpio_28 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 14 28 gpio_29 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 27 gpio_30 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 26 gpio_31 dio general purpose input/output programmable 3.3v/5v tolerance bidirectional buffer, pull - down 2 - wire master serial bus (i2c) 24 i2c_sdat dio 2 - wire master serial data programmable 3.3v/5v tolerant bidirectional buffer, pull - down 23 i2c_sclk dio 2 - wire master serial clock programmable 3.3v/5v tolerant bidirectional buffer, pull - down 4 - wire spi serial bus 2 spi_cs0 do chip select 3 spi_sck do serial clock 4 spi_miso do serial data out 5 spi_mosi di serial data in miscellaneous 76 rstb power on reset 32 resetn reset pin 40 pdsw do power down switch normal: 0 suspend: 1 42 test di for test 14 a - a mix_en di 0: a - a path disable 1: a - a path enable 15 eq_en di 0: disable eq/ 1: enable eq 49 sel2 di hw select for different pid 50 sel1 di hw select for different pid 118 mode_0 di mode_1= 0, mode_0= 0 for headset mode_1= 0, mode_0= 1 for microphone mode_1= 1, mode_0= 0 for speaker mode_1= 1, mode_0= 1 for docking 119 mode_1 di
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 15 6 usb audio topology cm6523 / CM6523B supports 4 types of topology by default. t hey are headset, docking, speaker, mic. different topology can be selected by pin mode_0 and mode_1. t he combination s are as below. mode_1= 0, mode_0= 0 for headset mode_1= 0, mode_0= 1 for microphone mode_1= 1, mode_0= 0 for speaker mode_1= 1, mode_0= 1 for docking 6.1 headset topology 0 x 09 mixer 0x07 fea 0x05 fea 0x06 fea usb stream mic 0x08 sel speaker usb s tream 0x01 it 0x02 it 0x03 ot 0x04 ot device descriptor offset field size value (hex) description 0 blength 1 12 descriptor length 1 bdescriptortype 1 01 device descriptor 2 bcdusb 2 0110 usb 1.1 compliant 4 bdeviceclass 1 00 device class specified by interface 5 bdevicesubclass 1 00 device subclass specified by interface 6 bdeviceprotocol 1 00 device protocol specified by interface 7 bmaxpacketsize0 1 10 endpoint zero packet size 8 idvendor 2 0 d 8 c vendor id 10 idproduct 2 0178~017f product id 12 bcddevice 2 0 00 0 device release number 14 imanufacturer 1 0 1 index of string descriptor describing manufacturer 15 iproduct 1 0 2 index of string descriptor describing product 16 iserialnumber 1 00 index of string descriptor describing serial number 17 bnumconfigurations 1 01 number of configuration
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 16 configuration descriptor offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 02 configuration descriptor 2 wtotallength 2 011d total length of data returned for this configuration: 285 b ytes 4 bnuminterfaces 1 0 4 number of interfaces supported by this configuration: 00: control 01: iso - out 02: iso - in 03: int - in (hid) 5 bconfigurationvalue 1 01 configuration value 6 iconfiguration 1 00 index of string descriptor describing this configuration 7 bmattributes 1 80 attributes(bus powered) 8 bmaxpower 1 32 maximum power consumption from bus = 1 00ma: 8 ? h32 ( 50 x2 ma) (pwrsel _2 = 1) audio control interface 0 descriptor 0 offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 04 interface descriptor 2 binterfacenumber 1 00 interface number 3 balternatesetting 1 00 alternate interface 4 bnumendpoints 1 00 number of endpoint used by this interface 5 binterfaceclass 1 01 audio interface class 6 binterfacesubclass 1 01 subclass code: audio_control 7 binterfaceprotocol 1 00 protocol code 8 iinterface 1 00 index of string descriptor describing this interface 6.2 speaker topology device descriptor offset field size value (hex) description 0 blength 1 12 descriptor length 1 bdescriptortype 1 01 device descriptor 2 bcdusb 2 0110 usb 1.1 compliant 4 bdeviceclass 1 00 device class specified by interface 5 bdevicesubclass 1 00 device subclass specified by interface 6 bdeviceprotocol 1 00 device protocol specified by interface 7 bmaxpacketsize0 1 10 endpoint zero packet size 8 idvendor 2 0 d 8 c vendor id 0x03 fea usb stream speaker 0x01 it 0x02 ot
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 17 10 idproduct 2 0180~018f product id 12 bcddevice 2 0 00 0 device release number 14 imanufacturer 1 0 1 index of string descriptor describing manufacturer 15 iproduct 1 0 2 index of string descriptor describing product 16 iserialnumber 1 00 index of string descriptor describing serial number 17 bnumconfigurations 1 01 number of configuration configuration descriptor offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 02 configuration descriptor 2 wtotallength 2 0099 total length of data returned for this configuration: 153 b ytes 4 bnuminterfaces 1 0 3 number of interfaces supported by this configuration: 00: control 01: iso - out 02: int - in (hid) 5 bconfigurationvalue 1 01 configuration value 6 iconfiguration 1 00 index of string descriptor describing this configuration 7 bmattributes 1 80 attributes(bus powered) 8 bmaxpower 1 32 maximum power consumption from bus = 1 00ma: 8 ? h32 ( 50 x2 ma) (pwrsel _2 = 1) audio control interface 0 descriptor 0 offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 04 interface descriptor 2 binterfacenumber 1 00 interface number 3 balternatesetting 1 00 alternate interface 4 bnumendpoints 1 00 number of endpoint used by this interface 5 binterfaceclass 1 01 audio interface class 6 binterfacesubclass 1 01 subclass code: audio_control 7 binterfaceprotocol 1 00 protocol code 8 iinterface 1 00 index of string descriptor describing this interface
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 18 6.3 docking topology device descriptor offset field size value (hex) description 0 blength 1 12 descriptor length 1 bdescriptortype 1 01 device descriptor 2 bcdusb 2 0110 usb 1.1 compliant 4 bdeviceclass 1 00 device class specified by interface 5 bdevicesubclass 1 00 device subclass specified by interface 6 bdeviceprotocol 1 00 device protocol specified by interface 7 bmaxpacketsize0 1 10 endpoint zero packet size 8 idvendor 2 0 d 8 c vendor id 10 idproduct 2 01a8~01af product id 12 bcddevice 2 0 00 0 device release number 14 imanufacturer 1 0 1 index of string descriptor describing manufacturer 15 iproduct 1 0 2 index of string descriptor describing product 16 iserialnumber 1 00 index of string descriptor describing serial number
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 19 17 bnumconfigurations 1 01 number of configuration configuration descriptor offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 02 configuration descriptor 2 wtotallength 2 016d total length of data returned for this configuration: 365 b ytes 4 bnuminterfaces 1 0 4 number of interfaces supported by this configuration: 00: control 01: iso - out 02: iso - in 03: hid 5 bconfigurationvalue 1 01 configuration value 6 iconfiguration 1 00 index of string descriptor describing this configuration 7 bmattributes 1 80 attributes(bus powered) 8 bmaxpower 1 32 maximum power consumption from bus = 1 00ma: 8 ? h32 ( 50 x2 ma) (pwrsel _2 = 1) audio control interface 0 descriptor 0 offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 04 interface descriptor 2 binterfacenumber 1 00 interface number 3 balternatesetting 1 00 alternate interface 4 bnumendpoints 1 00 number of endpoint used by this interface 5 binterfaceclass 1 01 audio interface class 6 binterfacesubclass 1 01 subclass code: audio_control 7 binterfaceprotocol 1 00 protocol code 8 iinterface 1 00 index of string descriptor describing this interface 6.4 microphone (stereo) topology device descriptor offset field size value (hex) description 0 blength 1 12 descriptor length 1 bdescriptortype 1 01 device descriptor 2 bcdusb 2 0110 usb 1.1 compliant 4 bdeviceclass 1 00 device class specified by interface 5 bdevicesubclass 1 00 device subclass specified by interface 6 bdeviceprotocol 1 00 device protocol specified by interface 7 bmaxpacketsize0 1 10 endpoint zero packet size 8 idvendor 2 0 d 8 c vendor id 10 idproduct 2 0190~019f product id mic usb stream 0x01 it 0x02 ot 0x03 fea 0x04 sel
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 20 12 bcddevice 2 0 00 0 device release number 14 imanufacturer 1 0 1 index of string descriptor describing manufacturer 15 iproduct 1 0 2 index of string descriptor describing product 16 iserialnumber 1 00 index of string descriptor describing serial number 17 bnumconfigurations 1 01 number of configuration configuration descriptor offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 02 configuration descriptor 2 wtotallength 2 00a0 total length of data returned for this configuration: 160 b ytes 4 bnuminterfaces 1 0 3 number of interfaces supported by this configuration: 00: control 01: iso - in 03: hid 5 bconfigurationvalue 1 01 configuration value 6 iconfiguration 1 00 index of string descriptor describing this configuration 7 bmattributes 1 80 attributes(bus powered) 8 bmaxpower 1 32 maximum power consumption from bus = 1 00ma: 8 ? h32 ( 50 x2 ma) (pwrsel _2 = 1) audio control interface 0 descriptor 0 offset field size value (hex) description 0 blength 1 09 descriptor length 1 bdescriptortype 1 04 interface descriptor 2 binterfacenumber 1 00 interface number 3 balternatesetting 1 00 alternate interface 4 bnumendpoints 1 00 number of endpoint used by this interface 5 binterfaceclass 1 01 audio interface class 6 binterfacesubclass 1 01 subclass code: audio_control 7 binterfaceprotocol 1 00 protocol code 8 iinterface 1 00 index of string descriptor describing this interface 7 function description 7.1 playback equalizer 7.1.1 5 - band equalizer cm6523 / CM6523B ha s integrated 5 - band hardware digital equalizer (eq) engine inside the chips to fulfill various application usages. it provides up - to - 4 preset modes on customer?s product design for different user scenarios including default/music, movies , g am ing and communi cation modes. customers could also change the gain parameters for each of the preset application eq mode via eeprom coding. in addition, the eq engine could also be utilized for compensating and fine - tuning the headphone driver for sound pressure level ( sp l ) performance to a specific preference. in this case, customers could fully customize all e q coefficients (center frequenc y , gain values, and bandwidth) to one optimized frequency response curve and setting in terms of the headphone driver and housing?s acoustics characteristics , also via eeprom programming .
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 21 the eq engine contains 5 frequency bands (fc) of digital filters to conduct transfer functions of the frequency response over the audio band. it allows maximum + - 12db digital gain (gain) for each band with 0.5db adjustment per step. each filter will have i ts bandwidth (bw) factor between 0 and 1.0. fc: center frequency, f1~f5, 20 cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 22 3 eq usage/application scenarios no scenario gain value center frequency / bandwidth factor num ber of mode s user control type 1 4 switchable preset s configurable fixed 4 hardware 2 full - customized eq configurable configurable 1 n.a. 3 treble/bass feature unit configurable configurable 1 software note: hardware user control type means end - users could select which eq mode they ? re going to use by a hardware switch/button on the product; software control means they could control the treble/bass gain values by gui in windows os sound device advanced settings.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 23 7.1.2 4 preset eq mode as mentioned above, eq engine already provides 4 preset eq modes for different user scenarios/applications . end u sers could use the hardware switch on the product (determined by 2 eq configuration input pins) to dynamically change to different eq mode s. the following shows the frequency response of each mode. mode gpio8 gpio7 color d efault 0 0 ---------------- gaming 0 1 ---------------- c ommunication 1 0 ---------------- m ovie 1 1 ---------------- audio precision 04/20/11 15:35:35 da-eq-spdif_in_da_out.at27 color sweep trace line style thick data axi s comment 1 1 red solid 2 an l r.am p l left 00 2 1 magenta solid 2 an l r.am p l left 11 3 1 c ya n solid 2 an l r.am p l left 10 4 1 blue solid 2 an l r.am p l left -10 +1 -9 -8 -7 -6 -5 -4 -3 -2 -1 -0 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz d efault c ommunication m ovie gaming
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 24 7.2 recording equalizer cm6523 / CM6523B also provide 5 - band equalizer for the input. i t can be used to compensate the frequency response of microphone unit. c ustomers could fully customize all eq coefficients (center frequenc y , gain values, and bandwidth) through external eeprom. 7.3 recording agc automatic gain control (agc) is an automaticall y controlled method to adjust with intensity of signal; agc is closes the return circuit; that is by the negative response system too. agc is by way of compressing volume, will increase gain first when agc is started, set up the upper and lower limits of t he signal; compress the dynamic range of sound. usually use the occasion of agc, should be recording and producing and speaking sound, or volume is being changed under little environment. if the lasting low voice of volume, agc will enlarge volume, volume is sustained loudly, agc will reduce volume. features programmable agc parameters selectable gain from ? 12 db to 45 db in 1 - db steps selectable attack, release and hold times agc enable/disable function limiter enable/disable function pre - detect limiter level function two - channel agc independent u nder input source types, to set agc gain max/min limit i2s rec +12~ - 16db 0xf9= 0x1c (max) +fix gain(9db) = 0x25 0cfa= 0x00(min) d igmic +20 ~ - 16db 0xf9= 0x24 (max) +fix gain(9db) =0x2d 0xfa= 0x00(min) a nalog mic +30 ~ 0db 0xf9=0x0f +fix gain(9db) inv - > 0x39 (max) 0xfa=0x2d inv - > 0x12(min) agc variable description fixed gain: the normal gain of the device when the agc is inactive. limiter level: the value that sets the maximum allowed output amplitude. attack time: the minimum time between two gain decrements.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 25 release time: the minimum time between two gain increments. hold time: the time it takes for the very first gain increment after the input signal ampli tude decreases. input signal output signal max threshold max threshold attack time hold time release time decrease gain hold gain increase gain
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 26 7.4 usb 2.0 switch usb switch interface signal name bit num i/o function control bits sw_usb<1:0> 2 i c ontrol bits for usb switch: usb20 off, usb11 off. usb20 off, usb11 on. usb20 on, usb11 off. usb20 on, usb11 on. sw_usb<1,0>= (00) sw_usb<1,0>= (01) sw_usb<1,0>= (10) sw_usb<1,0>= (11) 7.5 hid function hid is h uman i nterface d evice, it ? s a type of computer device to interact with human for the input and output. th e most common hid devices are the usb keyboard and mouse. cm6523 / CM6523B also provide some basic hid buttons, such as volume up, volume down, play back mute, etc. and also through set output report and get input report to communicate with external device. usb_dp_pc usb_dm_pc usb_dp usb_dm usb_dp_ipod usb_dm_ipod cm6523 / usb11 usb20 ipod pc analog pad digital pad usb11 phy sw_usb< 0 > sw_usb<1>
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 27 7.5.1 hid interrupt in input data format: byte 0 always 1 for org hid event report id byte1 for defined hid event, and each event occupies one bit byte2 byte3 start address of returned data (h - start_addr) byte4 start address of returned data (l - start_addr) byte5 bit7 bit6:uart_int bit5:gpi_int bit4:spis_int( slavemode int) bit3: spim_int(mastermode int) bit2:i2cs_int(slavemode int) bit1:i2cm_int(mastermode int) bit0: ir_int byte6 read data of [start_addr] byte7 read data of [start_addr+1] byte8 read data of [start_addr+2] byte9 read data of [start_addr+3] byte10 read data of [start_addr+4] byte11 read data of [start_addr+5] byte12 read data of [start_addr+6] byte13 read data of [start_addr+7] byte14 read data of [start_addr+8] byte15 read data of [start_addr+9] hid get_input_report command format: bmrequesttype brequest wvalue windex wlength data 8 ? h a1 8 ? h 01 (get_report) 16 ? h 01 01 (rpt type + rpt id) 16 ? h 00 03 (interface) 16 ? h 00 10 (16 bytes) report *note: the start_addr value in the input reported is put in the internal regis ter a dd ress 0xff.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 28 software must set the value of start_addr regis ter to make sure get input report can read the proper data you want. input data format: byte 0 always 1 for org hid event report id byte1 for defined hid event, and each event occupies one bit byte2 byte3 start address of returned data (h - start_addr) byte4 start address of returned data (l - start_addr) byte5 bit7 bit6:uart_int bit5:gpi_int bit4:spis_int(slavemode int) bit3: spim_int(mastermode int) bit2:i2cs_int(slavemode int) bit1:i2cm_int(mastermode int) bit0: ir_int byte6 read data of [start_addr] byte7 read data of [start_addr+1] byte8 read data of [start_addr+2] byte9 read data of [start_addr+3] byte10 read data of [start_addr+4] byte11 read data of [start_addr+5] byte12 read data of [start_addr+6] byte13 read data of [start_addr+7] byte14 read data of [start_addr+8] byte15 read data of [start_addr+9] 7.5.2 hid set_output_report command format: bmrequesttype brequest wvalue windex wlength data 8 ? h 21 8 ? h 09 (set_report) 16 ? h 02 01 (rpt type + rpt 16 ? h 00 03 (interface) 16 ? h 00 10 (16 bytes) report
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 29 id) *note: byte5 is the beginning address of this write sequence. output data format: byte 0 always 1 for org hid event report id byte1 start address of write reg (h - start_addr) byte2 start address of write reg (l - start_addr) byte3 effective write/read data length (<=12) byte4 write data to [start_addr] byte5 write data to [start_addr+1] byte6 write data to [start_addr+2] byte7 write data to [start_addr+3] byte8 write data to [start_addr+4] byte9 write data to [start_addr+5] byte10 write data to [start_addr+6] byte11 write data to [start_addr+7] byte12 write data to [start_addr+8] byte13 write data to [start_addr+9] byte14 write data to [start_addr+10] byte15 write data to [start_addr+11] 7.6 vendor command definition 7.6.1 vender command read command format: bmrequesttype brequest wvalue windex wlength data 8 ? h c3 8 ? h 02 (command 2) 16? h -- -- (start address of in put data ) 16? h 00 00 16? h 00 ? (<=64 bytes) d a ta
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 30 input data format: b yte 0 data of reg[wvalue] b yte 1 data of reg[wvalue + 1] b yte 2 data of reg[wvalue + 2] ? ? b yte 63 data of reg[wvalue + 63] 7.6.2 vender command write command format: bmrequesttype brequest wvalue windex wlength data 8 ? h 43 8 ? h 01 (command 1) 16? h -- -- (start address of output data ) 16? h 00 00 16? h 00 ? (<=64 bytes) data output data format: b yte 0 data of reg[wvalue] b yte 1 data of reg[wvalue + 1] b yte 2 data of reg[wvalue + 2] ? ? b yte 63 data of reg[wvalue + 63] 7.7 i2s control description 7.7.1 i2s format description i2s interface setting i 2 s has three clock signals, mclk, bclk and lrck, and at least one data line depending on the channels supported. one data line contains two channels. therefore, there have four data lines for a 8 - channel i 2 s dac controller. the three i 2 s clock symbols are e xplained below. mclk = main clock. bclk = bit clock. lrck = left and right clock. basic of i2s bus both master and slave modes of i 2 s are supported, namely i 2 s dac, i 2 s adc 1, i 2 s adc 2, i 2 s adc 3. master mode means bclk and lr ck are provided as shown in below left. on the contrary, slave mode means bclk and
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 31 lrck are provided by the i 2 s codecs as below right. i2s interface codec mclk bclk lrck i2s interface codec mclk bclk lrck master mode slave mode figure - 1 i2s master/slave block diagram below figure indicates the basic waveform of i 2 s. note that bclk is generated at the positive edges of mclk with the ratios 1, 1/2, 1/4, or 1/8, and lrck is generated at the negative edges of bclk with the ratios 1/64, 1/128, 1/256. data lines are transited at the negative edges of bclk, and are sampled at the positive edges of bclk by codecs in case of playback or recording. msb msb 1 2 3 n -1 n 4 lsb lsb 1 2 3 n -1 n 4 lrck bclk din/ dout left channel right channel figure - 2 i2s timing diagram for the i 2 s dac controller, the audio data is transformed from the parallel format to the serial format before transmitted. then, the bit data is shifted out one by one with the msb first via dout signal. if the i 2 s dac controller is set to 32 bits, at least 32 bclk clocks must exist in both lrck left and right channels. in the same manner, the audio data is transformed from the coming serial format to the parallel format for a i 2 s adc controller. left justified mode in the left justified mode of the i 2 s dac controller, the msb data bit is clocked out at the negative edge of bclk which is aligned to the transition of lrck. in the left justified mode of i 2 s adc controllers, the msb data bit is clocked out by codecs and sampled at t he first positive edge of bclk which follows a lrck transition. lrck is high during left channel transmission and low during right channel transmission in the left justified mode.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 32 msb msb 1 2 3 n - 1 n 4 lsb lsb 1 2 3 n - 1 n 4 lrck bclk din/ dout left channel right chan nel where the msb is clocked out the msb is sampled here figure - 3 left jus tified mode timing diagram of i2s i2s mode in the i 2 s mode of the i 2 s dac controller, the msb data bit is clocked out by cmi8788 at the first negative edge of bclk which follows a lrck transition. in the i 2 s mode of i 2 s adc controllers, the msb data bit is clocked out by codecs and sampled at the second positive edge of bclk which follows a lrck transition. lrck is low during left channel transmission and high during right channel transmission in the i 2 s mode. msb msb 1 2 3 n - 1 n lsb lsb 1 2 3 n - 1 n lrck bclk din/ dout left cha nnel right channel where the msb is clocked out the msb is sampled here 1 bclk 1 bclk figure - 4 i2s mode timing diagram of i2s 7.7.2 i2s mclk/bclk/lrck ratio and format for cm6523 / CM6523B internal codec sampling freq. resolution format bclk/lrck mclk/lrck default 24 bits left justified 64 256 others 8/11.025/16/ 22.5/32/44.1/48 /88.2/96 16/24 bits left justified / i2s - mode 64 256
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 33 external codec sampling freq. resolution format bclk/lrck mclk/lrck master mode 8/11.025/16/ 22.5/32/44.1/48 16/24 bits left justified / i2s - mode 64 256/512 88.2/96 16/24 bits left justified / i2s - mode 64 256 slave mode mclk from cm6523 / CM6523B 8/11.025/16/ 22.5/32/44.1/48 16/24 bits left justified / i2s - mode 64 256/512 88.2/96 16/24 bits left justified / i2s - mode 64 256 slave mode mclk from external 8/11.025/16/ 22.5/32/44.1/48 /88.2/96 16/24 bits left justified / i2s - mode 64 128/256/512
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 34 7.8 spdif control description 7.8.1 spdif frame description ? audio format : linear 16 bit default, up to 24 bit expandable ? allowed sampling frequencies (fs) of the audio: ? 44.1khz from cd ? 48 khz from dat ? 32 khz from dsr ? one way communication: from a transmitter to a receiver. ? control information: ? v (validity) bit : indicates if audio sample is valid. ? u (user) bit : user free coding i.e. running time song, track number. ? c (channel status) bit : emphasis, sampling rate and copy permit. ? p (parity) bit : error detection bit to check for good reception. ? coding format: biphase mark except the headers (preambles), for sync purposes. ? bandwidth occupation : 100khz up to 6mhz (no dc!) ? signal bitrate is 2.8mhz (fs=44.1khz), 2mhz (fs=32khz) and 3.1mhz (fs=48khz).
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 35 1 0 1 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 0 0 1 1 0 1 0 0 1 0 0 clock data signal biphase mark signal figure - 17 biphase mark signal of spdif preamble cell - order cell - order (last cell "0") (last cell "1") -------------------------------------- -------- -------- "b" 11101000 00010111 "m" 11100010 00011101 "w" 11100100 00011011 preamble b: marks a word containing data for channel a (left) at the start of the data - block. preamble m: marks a word with data for channel a that isn't at the start of the data - block. preamble w: marks a word containing data for channel b. (right, for stereo). when using more than 2 channels, this could also be any other channel (except for a). the number of subframes that are used depends on the number of channels that is transmitted. a cd - player uses channels a and b (left/right) and so each frame contains two subframes. a block contains 192 frames and starts with a preamble "b": preamble aux data lsb audio data msb v u c p 0 3 4 7 8 27 28 29 30 31 sub-frame v: valid, u:user - data, c:channel - status - data, p:parity - bit figure - 5 spdif sub - frame description
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 36 in each block, 384 bits of channel status and subcode info are transmitted. the channel - status bits are equal for both subframes, so actually only 192 useful bits are transmitted: channela m channela w channela b channela w channela m channela w frame 191 frame 0 frame 1 subframe subframe figure - 6 preamble description of 192 spdif frame 7.8.2 spdif out channel status bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7 byte0 consumer /professional audio/ non - audio copyright pre - emphasis mode default 0(p) 0(p) 1(p) 0(p) 0(fixed) 0(fixed) 0(fixed) 0(fixed) byte1 category code l default 0(p) 0(p) 0(p) 0(p) 0(p) 0(p) 0(p) 0(p) byte2 source number channel number default 0(fixed) 0(fixed) 0(fixed) 0(fixed) 0(fixed) 0(fixed) 0(fixed) 0(fixed) byte3 sampling frequency clock accuracy reserved default 0(p) 0(p) 0(p) 0(p) 0(fixed) 0(fixed) 0(fixed) 0(fixed) note p : these bit can be programmed by usb hid or usb vendor command 7.8.3 spdif in channel status bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7 byte0 consumer /professional audio/ non - audio copyright pre - emphasis mode default 0( r) 0( r) 1( r) 0( r) 0( r) 0( r) 0( r) 0( r) byte1 category code l default 0( r) 0( r) 0( r) 0( r) 0( r) 0( r) 0( r) 0( r) byte2 source number channel number default 0( r) 0( r) 0( r) 0( r) 0( r) 0( r) 0( r) 0( r)
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 37 byte3 sampling frequency clock accuracy reserved default 0( r) 0( r) 0( r) 0( r) 0( r) 0( r) 0(fixed) 0(fixed) note r : these bit can be read by usb hid or usb vendor command 7.9 digital mic digital_mic clock and data timing
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 38 7.10 i2c interface 7.10.1 i2c master mode i2c protocol timing a a a a slave address 0 map address data0 data1 a a slave address 0 map address a slave address 1 a data0 write transaction read transaction from master to slave from slave to master scl 0 a a a a map data 1 sda 1 . n byte write transaction slave address 1 a data 1 sda 2 . n byte read transaction slave address a a from master to slave from slave to master ) ( ) ( high sda e acknowledg not a low sda e acknowledg a = = stop stop map : memory address pointer ( the target register address in slave device ) scl 1 a data slave address start stop 0 a a map sda 3. auto read transaction (= write - map - only + n byte read transaction ) slave address stop start data data data data data a 7.10.2 i2c - master read with clk_sync mode
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 39 7.10.3 i2c slave mode slave mode architecture ?7 - bit slave address = 7?b0 001000 to 7? b0001011 ? cm6523 / CM6523B can serves as a slave device with bit rate up to 400kbps (fast mode). external mcu can write data to cm6523 / CM6523B or read data from cm6523 / CM6523B (no size limitation in i2c interface). since host side and mcu can both access to all the internal reg isters. cm6523 / CM6523B will transfer an interrupt to internal mcu until the int bit of i2c control register have been clean by internal mcu. the interrupt will be trigger when write transaction done or detect read - slave - address. the main usage of 2 - wir e slave bus is to become the interface between the cm6523 / CM6523B and a external micro control unit ( e mcu). 7.11 spi interface 7.11.1 spi master mode the spi interface is used to transfer control data between the cm6523 / CM6523B and external codecs. it is not a standard interface. every vendor has its implementation, and the implementation is somewhat different, but generally speaking, all of them comprise four signals, spi_cen , spi_clock , spi_data_o , spi_data_i . their meanings a re as follows.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 40 ? spi_cen : the spi chip enable signal that is used to inform a codec when it should latch the data. ? spi_clock : the spi clock signal. ? spi_data_o : the spi data output to codec. ? spi_data_i : the spi data input from codec. the spi design goal and spi transactions our goal is to design a robust spi interface which can be suitable for all the existing codec. after analyzing the spi of codec, we have written down the following difference among them. 1). an spi interface which can read data from cod ec and write data to codec has 4 wires, but some codec only support input data. in other words, the data in the codec registers can not be retri e ved by audio processor. this kind of codec only needs 3 wire s. 2). an spi transaction length is 2 or 3 bytes dependi ng on the codec. 3). some codec latch control data at spi clock high state, but some codec latch control data at spi clock low state 4). spi clock polarity and data capture phase can be selected by cpol/cpha register. 5). the upmost spi clock frequencies are different for the codec. for the difference 1 listed above, we have designed a 4 - wire spi interface, which is able to accommodate the 3 - wire spi interface as well. for difference 2 and 3, control bits in the spi interface of the cm6523 / CM6523B is used to initiated a 2 - byte or 3 - byte data transfer, and maintain spi clock high or low at codec latching data. 7.11.2 spi transfer length 2b/3b 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data in address offset 40h data in address offset 41h data in address offset 42h high impedance msb r/w bit is somewhere between bit23~bit16, depending on different codec fig. 28 an spi 3-byte write transaction with codec latching data at spi_clk low state.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 41 23 22 21 20 19 18 17 16 data in address offset 40h high impedance fig. 29 an spi 3-byte read transaction with codec latching data at spi _clk high state. dont care 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data in address offset 40h data in address offset 41h high impedance msb r/w bit is somewhere between bit23~bit16, depending on different codec fig. 30 an spi 2-byte write transaction with codec latching data at spi_clk high state. data in address offset 40 h high impedance fig. 31 an spi 3-byte read transaction with codec latching data at spi_clk low state. dont care 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7.11.3 spi latch data at high/low clock state
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 42 spi_clk spi_data_o spi_cen 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ms b lsb codec latch data at spi_clk = 1 data in address offset b0h data in address offset b1h data in address offset b2h high impedance spi_data_i spi 3 - byte write transaction r/w bit is somewhere between bit23~bit16 , depending on different codecs spi 3 - byte write transa c tion with high state latch spi_clk spi_data_o spi_cen 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 msb lsb codec latch data at spi_clk = 0 data in address offset b0h data in address offset b1h data in address offset b2h high impedance spi_data_i spi 3 - byte write transaction r/w bit is somewhere between bit23~b it16, depending on different codecs spi 3 - byte write transaction with low state latch
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 43 spi_clk spi_data_o spi_cen 23 22 21 20 19 18 17 16 msb lsb rm5003 latch data at spi_clk= 1 data in address offset 9bh high impedance spi 3 - byte read transaction (r/w bit is embedded in spi_data_o [23:16], but this bit position is dependent on codecs) the bit lengt h of the high impedance is dependent on the individual codec. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 spi_data_i msb lsb don ? t care data will be captured in address offset b1h, b2h this line is not fixed. it can be moved to the left or right depending on codecs spi 3 - byte read transaction with low state latch reg3e~3c description figure 4 c1_80_02 cpol=1/cpha=1/mstinten/codeclatch@spick_low/len=2b spi - fig.4 spi - fig.4 1) the spi of cpol/cpha selection a timing diagram showing clock polarity and phase
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 44 in addition to setting the clock frequency, the master must also configure the clock polarity and phase with respect to the data. freescale's spi block guide [1] names these two options as cpol and cpha respectively, and most vendors have adopted that convention. the timing diagram is shown to the right. the timing is fu rther described below and applies to both the master and the slave device. ? at cpol=0 the base value of the clock is zero o for cpha=0, data is captured on the clock's rising edge (low high transition) and data is propagated on a falling edge (high low clock transition). o for cpha=1, data is captured on the clock's falling edge and data is propagated on a rising edge. ? at cpol=1 the base value of the clock is one (inversion of cpol=0) o for cpha=0, data is captured on clock's falling edge and data is propagated on a rising e dge. o for cpha=1, data is captured on clock's rising edge and data is propagated on a falling edge. that is, cpha=0 means sample on the leading (first) clock edge, while cpha=1 means sample on the trailing (second) clock edge, regardless of whether that c lock edge is rising or falling. note that with cpha=0, the data must be stable for a half cycle before the first clock cycle. for all cpol and cpha modes, the initial clock value must be stable before the chip select line goes active. also, note that "data are read" in this document more typically means "data may be read". the mosi and miso signals are usually stable (at their reception points) for the half cycle until the next clock transition. spi master and slave devices may well sample data at different points in that half cycle.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 45 this adds more flexibility to the communication channel between the master and slave. some products use different naming conventions. for example, the ti msp4 30 uses the name ucckpl instead of cpol, and its ucckph is the inverse of cpha. when connecting two chips together, carefully examine the clock phase initialization values to be sure of using the right settings. reg3e~3c description figure cc ccstntenen fig c ccstntenen fig 3 c ccstntenen fig3 spi - fig.1 spi - fig.2 spi - fig.3 7.11.4 spi slave mode in cm6523 / CM6523B , spi - slave will trigger interrupt when receive 9 th bit data in 3byte mode. there are 6bits spi - clocks reserved for mcu to prepare wanted read data. in this c ase, the spi - clock operated at 800k hz and mcu have enough time to prepare read data. the procedure of mcu deal spi - slave - read list below. step 1 : mcu get interrupt and clear. step 2 : mcu read reg3e[2] to determine it?s a read or write command. and reg3e[3] defined as hid flag. step 3 : mcu read reg39 to get read address.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 46 step 4 : mcu prepare the content of read address. step 5 : mcu put the content into reg3b. spi - slave can read correctly only if all mcu operation under 6 spi- clocks. we can not support too faster spi negotiation. 16b(2b - addr - phase) - 1b(r/w) - 1b(hid) - 8b(addr) = 6b(reserved) the procedure of mcu deal spi - slave - write list below. step 1 : mcu get interrupt and clear. step 2 : mcu read reg3e[2] to determine it?s a read or write command. and reg3e[3] defined as hid flag. step 3 : mcu read reg39 to get read address.
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 47 8 electrical characteristics 8.1 absolute maximum ratings test conditions : d v 50 = 5 v, av50 = 5v, dgnd =0v, ta=+25 o c parameter symbol min typ max units storge temperature - - 25 - 150 o c operating ambient temperature - 0 25 75 o c d igital supply voltage (dv50 ) - 4.5 5.0 5.5 v analog supply volt ag e( av50 ) 4.5 5.0 5.5 v i/o pin voltage - gnd - v dd v esd(human body mode) 4000 v esd(machine mode) 200 v 8.2 recommended operation conditions parameter symbol min typ max units analog supply voltage - 5 v digital supply voltage 5 operating ambient temperature 25 o c crystal clock - 12.000 mhz 8.3 power c onsumption test conditions : dv50=5 v, av 50 = 5 v, dgnd =0v, ta=+25 o c sample rate=48khz, 16bits, operation: hp - out playback+mic - in recording, eq disable, spdif out disable parameter symbol min typ max units total power consumption (playback+record) - - 55 - ma standby power consumption - - 50 - ma suspend mode power consumption - - 10 - ua 8.4 dc characteristics test conditions : dv50 =5v, v dd = 3.3 v, dgnd =0v, ta=+25 o c , v dd = 3.3v parameter symbol min typ max units input voltage range vin v dd - 0.3 v dd v dd +0.3 v output voltage range vout 0 - v dd v high level input voltage vih 0.7v dd - - v low level input voltage vil - - 0.3v dd v high level output voitage voh 2.4 - - v
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 48 low level output voltage vol - 0.4 v input leakage current iil - 10 - 10 ua output leakage current iol - 10 - 10 ua output buffer driver current - 2 8 16 ma spdif transmit output driver current - 2 8 16 ma
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 49 8.5 audio performance 8.5.1 dac audio quality ta=25 , dv50=5v, av50=5v items te s t conditions test values unit min typ max full scale output voltage 10k ? loading fs=48khz 0.95 vrms 32 ? loading fs=48khz 0.82 vrms thd+n @ vout= - 3db 10k ? loading fs=48khz/16bits,a - weighted - 78 - 93 db 10k ? loading fs =96khz/24bits, a - weighted - 79 - 94 db 32 ? loading fs=48khz/16bits,a - weighted - 67 - 92 db 32 ? loading f s=96 khz /24 bits,a - weighted - 67 - 95 db dynamic range with signal present 10k ? loading fs=48khz/16bits,a - weighted 91 db 10k ? loading fs =96khz/24bits, a - weighted 94 db 32 ? loading fs=48khz/16bits,a - weighted 92 db 32 ? loading f s=96 khz /24 bits,a - weighted 94 db noise level during system activity 10k ? loading fs=48khz/16bits,a - weighted 94 db 10k ? loading fs=96khz/24bits, a - weighted 96 db 32 ? loading fs=48khz/16bits,a - weighted 96 db 32 ? loading f s=96 khz /24 bits,a - weighted 94 db inter channel phase delay 100hz ~ 20khz +0.02 +1.05 deg
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 50 sampling frequency accuracy 10k ? loading fs=48khz/16bits,a - weighted - 0.0043 +0.0015 % channel separation 10k ? loading fs=48khz/16bits,a - weighted 98 119 db 32 ? loading fs=48khz/16bits,a - weighted 67 78 db magnitud e response frequency response 10k ? loading fs=48khz/16bits,a - weighted - 0.085 - 0.937 db passband ripple 10k ? loading fs=48khz/16bits,a - weighted 0.291 db 8.5.2 adc audio quality ta=25 , dv50=5v, av50=5v , input test signal is 997hz sine wave, measure bandwidth is 20hz to 20khz items te s t conditions test values unit min typ max full scale output voltage microphone fs=48khz 1.11 vrms line in fs=48khz 1.08 thd+n @ vout= - 3db microphone fs=48khz/16bits,a - weighted - 81 - 89 db microphone fs=96khz/24bits, a - weighted --82 - 91 db line in fs=48khz/16bits,a - weighted - 82 - 90 db line in f s=96 khz /24 bits,a - weighted - 82 - 90 db dynamic range with signal present microphone fs=48khz/16bits,a - weighted 90 db microphone fs=96khz/24bits, a - weighted 91 db line in fs=48khz/16bits,a - weighted 90 db line in f s=96 khz /24 bits,a - weighted 90 db
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 51 sampling frequency accuracy microphone fs=48khz/16bits + 0.00 01 +0.009 % line in fs=48khz/16bits - 0.0048 - 0.0034 channel separation microphone fs=48khz/16bits 81 91 db microphone fs=96khz/24bits 83 91 db line in fs=48khz/16bits 86 89 line in f s=96 khz /24 bits 87 90 frequency response microphone fs=48khz/16bits,a - weighted - 0.433 - 0.484 db line in fs=48khz/16bits,a - weighted - 0.313 - 0.695 passband ripple microphone fs=48khz/16bits,a - weighted 0.204 db line in fs=48khz/16bits,a - weighted 0.159 8.5.3 a- a path audio quality ta=25 , dv50=5v, av50=5v items te s t conditions test values unit min typ max full scale output voltage microphone to line out 1.09 vrms thd+n @ vout= - 3db microphone to line out fs=48khz/16bits,a - weighted - 80 - 81 db dynamic range with signal present microphone to line out fs=48khz/16bits,a - weighted 92 db channel separation microphone to line out fs=48khz/16bits,a - weighted 74 119 db frequency response microphone to l i ne out fs=48khz/16bits,a - weighted - 0.194 +0.484 db
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 52 passband ripple microphone fs=48khz/16bits,a - weighted 0.1 db
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 53 9 package dimension model number package operating ambient temperature supply range cm6523 / CM6523B 128- pin lqfp 14mm 14 mm1.4mm (plastic) - 15 c to +70 c dvdd = 5 v, avdd = 5v outline dimensions * dimensions shown in inches and ( mm ) 128- lead thin plastic quad flatpack (lqfp) package dimension o f cm6523 / CM6523B
cm6523 / CM6523B usb audio sound chip www.cmedia.com.tw copyright ? c - media electronics inc. re v. 1.0 2 page 54 end of specifications c - media electronics inc. 6f., 100, sec. 4, civil boulevard, taipei, taiwan 106 r.o.c. tel + 886- 2 - 8773 - 1100 fax + 886 - 2 - 8773- 2211 e - mail sales@cmedia.com.tw disclaimer: information furnished by c - media electronics inc. is believed to be accurate and reliable. however, no responsibility is assumed by c - media electronics inc. for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change with out notice. no license is granted by implication or otherwise unde r any patent or patent rights of c - media. trademark and registered trademark are the property of their respective owners.

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